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    AD9512 参数 Datasheet PDF下载

    AD9512图片预览
    型号： AD9512
    PDF下载： 下载PDF文件 查看货源
    内容描述： 1.2 GHz的时钟分配IC ， 1.6 GHz的输入，分频器，延迟调整，五路输出 [1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs]
    分类和应用： 时钟
    文件页数/大小： 48 页 / 1007 K
    品牌： ABCO [ ABCO ELECTRONICS CO.LTD ]
     浏览型号AD9512的Datasheet PDF文件第1页浏览型号AD9512的Datasheet PDF文件第3页浏览型号AD9512的Datasheet PDF文件第4页浏览型号AD9512的Datasheet PDF文件第5页浏览型号AD9512的Datasheet PDF文件第6页浏览型号AD9512的Datasheet PDF文件第7页浏览型号AD9512的Datasheet PDF文件第8页浏览型号AD9512的Datasheet PDF文件第9页  
    AD9512
    TABLE OF CONTENTS
    Specifications..................................................................................... 4
    Clock Inputs .................................................................................. 4
    Clock Outputs ............................................................................... 4
    Timing Characteristics ................................................................ 5
    Clock Output Phase Noise .......................................................... 7
    Clock Output Additive Time Jitter........................................... 10
    Serial Control Port ..................................................................... 12
    FUNCTION Pin ......................................................................... 13
    SYNC Status Pin ......................................................................... 13
    Power............................................................................................ 14
    Timing Diagrams............................................................................ 15
    Absolute Maximum Ratings.......................................................... 16
    Thermal Characteristics ............................................................ 16
    ESD Caution................................................................................ 16
    Pin Configuration and Function Descriptions........................... 17
    Terminology .................................................................................... 19
    Typical Performance Characteristics ........................................... 20
    Functional Description .................................................................. 24
    Overall.......................................................................................... 24
    FUNCTION Pin ......................................................................... 24
    RESETB: 58h<6:5> = 00b (Default)..................................... 24
    SYNCB: 58h<6:5> = 01b ....................................................... 24
    PDB: 58h<6:5> = 11b............................................................. 24
    DSYNC and DSYNCB Pins....................................................... 24
    Clock Inputs ................................................................................ 24
    Dividers........................................................................................ 25
    Setting the Divide Ratio ........................................................ 25
    Setting the Duty Cycle ........................................................... 25
    Divider Phase Offset .............................................................. 29
    Delay Block.................................................................................. 30
    Calculating the Delay............................................................. 30
    Outputs ........................................................................................ 30
    Power-Down Modes .................................................................. 31
    Chip Power-Down or Sleep Mode—PDB........................... 31
    Distribution Power-Down .................................................... 31
    Individual Clock Output Power-Down............................... 31
    Individual Circuit Block Power-Down................................ 31
    Reset Modes ................................................................................ 31
    Power-On Reset—Start-Up Conditions when
    VS is Applied........................................................................... 31
    Asynchronous Reset via the FUNCTION Pin ................... 31
    Soft Reset via the Serial Port................................................. 31
    Single-Chip Synchronization.................................................... 32
    SYNCB—Hardware SYNC ................................................... 32
    Soft SYNC—Register 58h<2>............................................... 32
    Multichip Synchronization ....................................................... 32
    Serial Control Port ......................................................................... 33
    Serial Control Port Pin Descriptions....................................... 33
    General Operation of Serial Control Port............................... 33
    Framing a Communication Cycle with CSB ...................... 33
    Communication Cycle—Instruction Plus Data ................. 33
    Write ........................................................................................ 33
    Read ......................................................................................... 34
    The Instruction Word (16 Bits) ................................................ 34
    MSB/LSB First Transfers ........................................................... 34
    Register Map and Description ...................................................... 37
    Summary Table........................................................................... 37
    Register Map Description ......................................................... 39
    Power Supply................................................................................... 43
    Power Management ................................................................... 43
    Applications..................................................................................... 44
    Using the AD9512 Outputs for ADC Clock Applications.... 44
    CMOS Clock Distribution ........................................................ 44
    Rev. A | Page 2 of 48

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