AD9512
In general, by combining the 4-bit phase offset and the Start
H/L bit, there are 32 possible phase offset states (see Table 13).
Divider Phase Offset
The phase of each output may be selected, depending on the
divide ratio chosen. This is selected by writing the appropriate
values to the registers, which set the phase and start high/low
bit for each output. These are the odd numbered registers from
4Bh to 53h. Each divider has a 4-bit phase offset <3:0> and a
start high or low bit <4>.
Table 13. Phase Offset—Start H/L Bit
Phase Offset
(Fast Clock
4Bh to 53h
Rising Edges)
Phase Offset <3:0>
Start H/L <4>
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Following a sync pulse, the phase offset word determines how
many fast clock (CLK1 or CLK2) cycles to wait before initiating
a clock output edge. The Start H/L bit determines if the divider
output starts low or high. By giving each divider a different
phase offset, output-to-output delays can be set in increments of
the fast clock period, tCLK
.
8
9
8
9
Figure 25 shows three dividers, each set for DIV = 4, 50ꢀ duty
cycle. By incrementing the phase offset from 0 to 2, each output
is offset from the initial edge by a multiple of tCLK
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
10
11
12
13
14
15
0
1
2
3
4
.
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
CLOCK INPUT
CLK
tCLK
DIVIDER OUTPUTS
DIV = 4, DUTY = 50%
START = 0,
PHASE = 0
START = 0,
PHASE = 1
START = 0,
PHASE = 2
tCLK
5
6
7
8
2 × tCLK
Figure 25. Phase Offset—All Dividers Set for DIV = 4, Phase Set from 0 to 2
For example:
9
10
11
12
13
14
15
CLK1 = 491.52 MHz
tCLK1 = 1/491.52 = 2.0345 ns
For DIV = 4
Phase Offset 0 = 0 ns
Phase Offset 1 = 2.0345 ns
Phase Offset 2 = 4.069 ns
The three outputs may also be described as:
OUT1 = 0°
The resolution of the phase offset is set by the fast clock period
(tCLK) at CLK1 or CLK2. As a result, every divide ratio does not
have 32 unique phase offsets available. For any divide ratio, the
number of unique phase offsets is numerically equal to the
divide ratio (see Table 13):
DIV = 4
OUT2 = 90°
Unique Phase Offsets Are Phase = 0, 1, 2, 3
DIV= 7
OUT3 = 180°
Setting the phase offset to Phase = 4 results in the same relative
phase as the first channel, Phase = 0° or 360°.
Unique Phase Offsets Are Phase = 0, 1, 2, 3, 4, 5, 6
Rev. A | Page 29 of 48
ABCO [ ABCO ELECTRONICS CO.LTD ]
