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    6702PXH 参数 Datasheet PDF下载

    6702PXH图片预览
    型号： 6702PXH
    PDF下载： 下载PDF文件 查看货源
    内容描述： 64位PCI中枢 [64-bit PCI Hub]
    分类和应用： PC
    文件页数/大小： 214 页 / 2554 K
    品牌： INTEL [ INTEL CORPORATION ]
     浏览型号6702PXH的Datasheet PDF文件第1页浏览型号6702PXH的Datasheet PDF文件第2页浏览型号6702PXH的Datasheet PDF文件第3页浏览型号6702PXH的Datasheet PDF文件第5页浏览型号6702PXH的Datasheet PDF文件第6页浏览型号6702PXH的Datasheet PDF文件第7页浏览型号6702PXH的Datasheet PDF文件第8页浏览型号6702PXH的Datasheet PDF文件第9页  
    2.14
    2.15
    2.16
    2.17
    2.18
    2.19
    2.20
    Addressing ........................................................................................................................ 53
    2.14.1 I/O Window Addressing ...................................................................................... 53
    2.14.2 Memory Window Addressing .............................................................................. 55
    2.14.3 VGA Addressing ................................................................................................. 56
    Transaction Ordering ........................................................................................................ 57
    2.15.1 Intel® 6700PXH 64-bit PCI Hub Transaction Ordering....................................... 57
    I/OxAPIC Interrupt Controller (Functions 1 and 3) ............................................................ 58
    2.16.1 Interrupt Support................................................................................................. 58
    2.16.2 PCI Express* Legacy INTx Support and Boot Interrupt ...................................... 59
    2.16.3 Buffer Flushing.................................................................................................... 59
    2.16.4 EOI Special Cycles ............................................................................................. 59
    2.16.5 Interrupt Delivery ................................................................................................ 60
    SMBus Interface................................................................................................................ 61
    2.17.1 SMBus Commands............................................................................................. 61
    2.17.2 Initialization Sequence ........................................................................................ 62
    2.17.3 Configuration And Memory Reads...................................................................... 63
    2.17.4 Configuration and Memory Writes ...................................................................... 65
    2.17.5 Error Handling..................................................................................................... 67
    2.17.6 SMBus Interface Reset....................................................................................... 67
    2.17.7 Configuration Access Arbitration ........................................................................ 67
    System Setup .................................................................................................................... 68
    2.18.1 Clocking .............................................................................................................. 68
    2.18.2 Component Reset ............................................................................................... 69
    Reliability, Availability, and Serviceability (RAS) ............................................................... 71
    2.19.1 PCI Express* Error Handling .............................................................................. 71
    2.19.2 PCI Error Protection............................................................................................ 71
    2.19.3 PCI Standard Hot Plug Controller....................................................................... 71
    2.19.4 SMBus ................................................................................................................ 71
    Error Handling ................................................................................................................... 72
    2.20.1 PCI Express* Errors............................................................................................ 72
    2.20.2 PCI Errors ........................................................................................................... 72
    2.20.3 SHPC Errors ....................................................................................................... 74
    2.20.4 Core Errors ......................................................................................................... 74
    2.20.5 Global Error Register .......................................................................................... 75
    3
    Register Description......................................................................................................... 77
    3.1
    3.2
    3.3
    3.4
    3.5
    3.6
    PCI Configuration Registers.............................................................................................. 77
    Memory-Mapped Registers ............................................................................................... 78
    SMBus Port Registers....................................................................................................... 78
    Register Nomenclature and Access Attributes.................................................................. 78
    PCI Express*-to-PCI Bridges (D0:F0, F2) ......................................................................... 79
    3.5.1
    Configuration Registers ...................................................................................... 79
    PCI Express* to PCI Bridges (D0:F0, F2) Enhanced ...................................................... 113
    3.6.1
    Configuration Registers .................................................................................... 113
    3.6.2
    Power Management Registers ......................................................................... 124
    Hot Plug Controller Registers.......................................................................................... 128
    3.7.1
    Configuration Registers .................................................................................... 128
    3.7.2
    Offset 24h – 40h: Logical Slot Registers (LSR) 1 to 6 ...................................... 133
    I/OxAPIC Interrupt Controller Registers (Function 1 and 3)............................................ 136
    3.8.1
    PCI Configuration Space Registers .................................................................. 136
    3.8.2
    I/OxAPIC Direct Memory Space Registers ....................................................... 150
    3.8.3
    Indirect Memory Space Registers..................................................................... 152
    3.7
    3.8
    4
    Intel® 6702PXH 64-bit PCI Hub Specification Update

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