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    CY7C1470V25-200BZC 参数 Datasheet PDF下载

    CY7C1470V25-200BZC图片预览
    型号： CY7C1470V25-200BZC
    PDF下载： 下载PDF文件 查看货源
    内容描述： 72兆位（2M X 36/4的M× 18/1米× 72 ）流水线SRAM与NOBL架构 [72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL Architecture]
    分类和应用： 静态存储器
    文件页数/大小： 31 页 / 843 K
    品牌： CYPRESS [ CYPRESS SEMICONDUCTOR ]
     浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第1页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第2页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第4页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第5页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第6页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第7页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第8页浏览型号CY7C1470V25-200BZC的Datasheet PDF文件第9页  
    CY7C1470V25
    CY7C1472V25
    CY7C1474V25
    Contents
    Selection Guide ................................................................ 4
    Pin Configurations ........................................................... 4
    Pin Definitions .................................................................. 6
    Functional Overview ........................................................ 8
    Single Read Accesses ................................................ 8
    Burst Read Accesses .................................................. 8
    Single Write Accesses ................................................. 8
    Burst Write Accesses .................................................. 9
    Sleep Mode ................................................................. 9
    Linear Burst Address Table (MODE = GND) .................. 9
    Interleaved Burst Address Table
    (MODE = Floating or VDD) ............................................... 9
    ZZ Mode Electrical Characteristics ................................. 9
    Truth Table ..................................................................... 10
    Partial Write Cycle Description ..................................... 10
    IEEE 1149.1 Serial Boundary Scan (JTAG) .................. 12
    Disabling the JTAG Feature ...................................... 12
    TAP Controller State Diagram ....................................... 12
    Test Access Port (TAP) ............................................. 12
    TAP Controller Block Diagram ...................................... 12
    PERFORMING A TAP RESET .................................. 12
    TAP REGISTERS ...................................................... 12
    TAP Instruction Set ................................................... 13
    TAP Timing ...................................................................... 14
    TAP AC Switching Characteristics ............................... 14
    2.5 V TAP AC Test Conditions ....................................... 15
    2.5 V TAP AC Output Load Equivalent ......................... 15
    1.8 V TAP AC Test Conditions ....................................... 15
    1.8 V TAP AC Output Load Equivalent ........................ 15
    TAP DC Electrical Characteristics and
    Operating Conditions ..................................................... 15
    Identification Register Definitions ................................ 15
    Scan Register Sizes ....................................................... 16
    Identification Codes ....................................................... 16
    Boundary Scan Exit Order (2 M × 36) ........................... 17
    Boundary Scan Exit Order (4 M × 18) ........................... 17
    Boundary Scan Exit Order (1 M × 72) ........................... 18
    Maximum Ratings ........................................................... 19
    Operating Range ............................................................. 19
    Electrical Characteristics ............................................... 19
    Capacitance .................................................................... 20
    Thermal Resistance ........................................................ 20
    AC Test Loads and Waveforms ..................................... 21
    Switching Characteristics .............................................. 22
    Switching Waveforms .................................................... 23
    Read/Write/Timing ..................................................... 23
    NOP, STALL and DESELECT Cycles ....................... 24
    ZZ Mode Timing ........................................................ 24
    Ordering Information ...................................................... 25
    Ordering Code Definitions ......................................... 25
    Package Diagrams .......................................................... 26
    Acronyms ........................................................................ 28
    Document Conventions ................................................. 28
    Units of Measure ....................................................... 28
    Document History Page ................................................. 29
    Sales, Solutions, and Legal Information ...................... 31
    Worldwide Sales and Design Support ....................... 31
    Products .................................................................... 31
    PSoC Solutions ......................................................... 31
    Document Number: 38-05290 Rev. *L
    Page 3 of 31
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