CY7C1470V25
CY7C1472V25
CY7C1474V25
Scan Register Sizes
Register Name
Instruction
Bypass
ID
Boundary scan order–165-ball FBGA
Boundary scan order–209-ball BGA
Bit Size (× 36)
3
1
32
71
–
Bit Size (× 18)
3
1
32
52
–
Bit Size (× 72)
3
1
32
–
110
Identification Codes
Instruction
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
Code
000
001
010
011
100
Description
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces
all SRAM outputs to high Z state. This instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces
all SRAM output drivers to a high Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Does not
affect SRAM operation. This instruction does not implement 1149.1 preload function and is
therefore not 1149.1-compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
RESERVED
RESERVED
BYPASS
101
110
111
Document Number: 38-05290 Rev. *L
Page 16 of 31
CYPRESS [ CYPRESS SEMICONDUCTOR ]
