P r e l i m i n a r y
I n f o r m a t i o n
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 51
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 27. Standard Handshake Burst Suspend at address 3Fh
AC Characteristics ............................................................................................ 64
Figure 30. Read Cycle for Continuous Suspend ...................... 64
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 53
CMOS Compatible . . . . . . . . . . . . . . . . . . . . . . . . . 53
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
Key to Switching Waveforms . . . . . . . . . . . . . . . 54
Switching Waveforms . . . . . . . . . . . . . . . . . . . . . 54
Figure 36. Synchronous Program Operation Timings: WE#
Latched Addresses ............................................................. 71
Figure 37. Synchronous Program Operation Timings: CLK Latched
Addresses ......................................................................... 72
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 55
CLK Characterization ........................................................................................55
Figure 17. CLK Synchronous Burst Mode Read
Figure 18. Synchronous Burst Mode Read.............................. 58
Figure 26. Standard Handshake Burst Suspend at or after
CC
Power-up Diagram ........................................ 55
Timing Diagram.................................................................
Figure 46. Latency with Boundary Crossing ...........................
Figure 47. Latency with Boundary Crossing
78
79
Erase and Programming Performance . . . . . . . . 83
BGA Ball Capacitance . . . . . . . . . . . . . . . . . . . . . . 83
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . 84
6
Am29BDS128H/Am29BDS064H
27024_00_A5_E June 18, 2004
SPANSION [ SPANSION ]
