Document Revision History
26 Document Revision History
provides a revision history for this hardware specification.
Table 82. Document Revision History
Revision
2
Date
10/2009 •
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1
Substantive Change(s)
In
Table 5,
“MPC8377E Power Dissipation
,” corrected maximal application for 800/400 MHz to 4.3 W.
In
“MPC8377E Power Dissipation
1
,” added a column for “Typical Application at T
j
= 65°C (W)”.
j
= 65°C (W)”.
In
In
,” updated I
MVREF
maximum value for both DDR1
and DDR2 to 600 and 400
μA,
respectively. Also, updated Note 1 and added Note 2.
In
“Min” and “Max”. Footnote 2 updated to state “T is the MCK clock period”.
In
In
In
x,
the
In
LOS
maximum value for LSTS =0
to 150 mV .
In
RMTDX
I to 2.0 ns.
In
to VDD pin.
In
range to 125–200.
In
In
In
corrected t
NIKHOX
and t
NEKHOX
to t
NIKHOV
and t
NEKHOV
,
respectively.
02/2009 • In
rows for SerDes. In addition, changed 666 to 667 MHz.
• In
“MPC8377E Power Dissipation
1
,” added Notes 4 and 5. In addition, changed 666 to 667
MHz.
• In
footnote to references to MVREF, MDQ, and MDQS, referencing AN3665,
MPC837xE Design Checklist.
• In
updated t
DDKHCX
minimum value for 333 MHz to 2.40.
• In
footnote 10 and added footnote 13.
• In
core_clk.
• In
• Updated part numbering information in AF column in
addition, modified extended temperature information in notes 1 and 4.
• In
12/2008 Initial public release.
0
MPC8378E PowerQUICC
™
II Pro Processor Hardware Specifications, Rev. 2
124
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
