SPRS230M – OCTOBER 2003 – REVISED MARCH 2011
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6-9
6-10
6-11
6-12
6-13
6-14
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6-16
6-17
6-18
6-19
6-20
6-21
6-22
6-23
6-24
6-25
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6-27
Warm Reset
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Example of Effect of Writing Into PLLCR Register
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General-Purpose Output Timing
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General-Purpose Input Timing
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IDLE Entry and Exit Timing
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STANDBY Entry and Exit Timing Diagram
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HALT Wake-Up Using GPIOn
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PWM Hi-Z Characteristics
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ADCSOCAO or ADCSOCBO Timing
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External Interrupt Timing
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SPI Master Mode External Timing (Clock Phase = 0)
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SPI Master Mode External Timing (Clock Phase = 1)
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SPI Slave Mode External Timing (Clock Phase = 0)
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SPI Slave Mode External Timing (Clock Phase = 1)
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ADC Power-Up Control Bit Timing
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ADC Analog Input Impedance Model
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Sequential Sampling Mode (Single-Channel) Timing
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Simultaneous Sampling Mode Timing
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Sampling Mode
6
List of Figures
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