SPRS230M – OCTOBER 2003 – REVISED MARCH 2011
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6.10 Enhanced Control Peripherals
6.10.1 Enhanced Pulse Width Modulator (ePWM) Timing
PWM refers to PWM outputs on ePWM1–6.
shows the PWM timing requirements and
switching characteristics.
Table 6-22. ePWM Timing Requirements
(1)
TEST CONDITIONS
t
w(SYCIN)
Sync input pulse width
Asynchronous
Synchronous
With input qualifier
(1)
For an explanation of the input qualifier parameters, see
MIN
2t
c(SCO)
2t
c(SCO)
1t
c(SCO)
+ t
w(IQSW)
MAX
UNIT
cycles
cycles
cycles
Table 6-23. ePWM Switching Characteristics
PARAMETER
t
w(PWM)
t
w(SYNCOUT)
t
d(PWM)tza
t
d(TZ-PWM)HZ
Pulse duration, PWMx output high/low
Sync output pulse width
Delay time, trip input active to PWM forced high
Delay time, trip input active to PWM forced low
Delay time, trip input active to PWM Hi-Z
no pin load
TEST CONDITIONS
MIN
20
8t
c(SCO)
25
20
MAX
UNIT
ns
cycles
ns
ns
6.10.2 Trip-Zone Input Timing
XCLKOUT
(A)
t
w(TZ)
TZ
t
d(TZ-PWM)HZ
PWM
(B)
A.
B.
TZ: TZ1, TZ2, TZ3, TZ4, TZ5, TZ6
PWM refers to all the PWM pins in the device. The state of the PWM pins after TZ is taken high depends on the PWM
recovery software.
Figure 6-17. PWM Hi-Z Characteristics
Table 6-24. Trip-Zone input Timing Requirements
(1)
MIN
t
w(TZ)
Pulse duration, TZx input low
Asynchronous
Synchronous
With input qualifier
(1)
For an explanation of the input qualifier parameters, see
1t
c(SCO)
2t
c(SCO)
1t
c(SCO)
+ t
w(IQSW)
MAX
UNIT
cycles
cycles
cycles
116
Electrical Specifications
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