Freescale Semiconductor, Inc.
System Description
Dead Time Distortion Correction
+U
+U
÷ 2
ISx
+
-
PWM0
PWM1
i+
i-
Figure 2-4. Topology of Current Polarity Sensing
During PWM reload ISR, the desired PWM values for all three phases
are calculated as:
• PWM1 for phase 1
• PWM2 for phase 2
• PWM3 for phase 3
The values loaded into the individual PVAL registers of the separate
phases are shown in Table 2-1. Since AC motor control utilizes
center-aligned PWM modulation, only half of the dead time needs to be
added to / substracted from the desired PWM duty cycle to achieve the
distortion correction. Without dead time correction, the even PVAL
registers are loaded with the required PWM value, but the odd PVAL
registers are not used. When dead time correction is used, the even
PVAL registers are loaded with the desired PWM plus half of the dead
time (PWMx+DT/2), while the odd PVAL registers are loaded with the
desired PWM minus half of the dead time (PWMx-DT/2).
DRM019 — Rev 0
MOTOROLA
Designer Reference Manual
System Description
21
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