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L3M
TXC-03452B
DATA SHEET
Address
Bit
Symbol
Description
Test Bit Positions: These bits must be set 0.
CA
7-6
5
TEST
NOPOH
No Path Overhead: When this bit is set to 1, the VC-4 path overhead time
slots of the Add bus data signals ADATA(7-0) are set to a high impedance
and the ADD signal is high during these time slots. When this bit is set to 0,
ADATA(7-0) and ADD are active during these time slots. The ADATA (7-0)
byte values are set to 00H during these time slots.
4-0
TEST
Test Bit Positions: These bits must be set 0.
TXC-03452B-MB
Ed. 6, April 2001
- 74 of 96 -
ETC [ ETC ]
