July 2004
AS91L1006BU
PIN
PIN
PIN
TYPE
Stable state
after port/reset
PIN NAME
LSP3_TMS
NUMBER NUMBER
LQFP
DESCRIPTION
FPBGA
OUT
50
K10
IEEE1149.1 Test Mode Select on
Logic '1'
LSP 3 when PASS_THRU_ENABLE
is HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 010.
This pin is tri-stated for all other
combinations.
LSP3_TDO
OUT
53
H10
IEEE1149.1 Test Data Out on LSP 3 Logic '1'
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 010.
This pin is tri-stated for all other
combinations.
LSP3_TDI
IN
52
47
J10
IEEE1149.1 Test Data In on LSP 3
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 010.
IEEE1149.1 Test Reset on LSP 3
when PASS_THRU_ENABLE is
HIGH.
LSP3_TRST
OUT
J8
Buffered version
of signal present
on primary TRST
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 010.
This pin is tri-stated for all other
combinations.
LSP3_LSP_
AutoWR
OUT
48
K8
Flash, Memory Auto-Write on LSP 3 Logic '1'
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 010;
PRIM_AutoWR is routed to output.
This pin is tri-stated for all other
combinations.
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13
ETC [ ETC ]
