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AS91L1002U40L100CF 参数 Datasheet PDF下载

AS91L1002U40L100CF图片预览
型号: AS91L1002U40L100CF
PDF下载: 下载PDF文件 查看货源
内容描述: 该AS91L1006BU是一到6端口的JTAG网关 [The AS91L1006BU is a one to 6-port JTAG gateway]
分类和应用:
文件页数/大小: 28 页 / 568 K
品牌: ETC [ ETC ]
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July 2004  
AS91L1006BU  
Pass Through Support within the AS91L1006BU Device  
The AS91L1006BU device supports a  
Pass-Through mode where the primary or master  
IEEE1149.1 JTAG signals can be routed to any  
one of the LSPs. When this mode is activated, the  
“Debug Enable” signal for that LSP will go active,  
which can be used to place a processor such as  
the MPC8260 into BDM (Background Debug  
mode), if required. If no processors are present in  
the LSP, the Pass-Through mode can be used to  
assist in the generation of the test vectors or  
memory tests for the devices that are linked into  
the selected LSP. The pass-through feature has  
the effect of simplifying the test vector generation  
for the LSP, as it also has the effect of removing  
the AS91L1006BU device from the test vector  
generation process.  
PASS_THRU_Enable PASS_THRU_SEL(2) PASS_THRU_SEL(1) PASS_THRU_SEL(0) Active LSP  
High  
Low  
Low  
Low  
Low  
Low  
Low  
X
X
X
Normal  
Operation  
Low  
Low  
Low  
Low  
High  
High  
Low  
Low  
High  
High  
Low  
Low  
Low  
High  
Low  
High  
Low  
High  
LSP1  
LSP2  
LSP3  
LSP4  
LSP5  
LSP6  
Table 8 - Pass through mode in AS91L1006BU  
Note: When PASS_THRU_ENABLE is deasserted (logic “1”), then the LSPs are under  
control of the AS91L1006BU device logic. When PASS_THRU_ENABLE is asserted (logic  
“0”) and if an invalid combination is presented on the PASS_THRU_SEL lines, then all LSPs  
are tri-stated.  
www.alsc.com  
Alliance Semiconductor  
2003, 2004 © Copyright Alliance Semiconductor Corporation. All Rights reserved.  
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