July 2004
AS91L1006BU
PIN
PIN
PIN
TYPE
Stable state
after port/reset
PIN NAME
NUMBER NUMBER
LQFP
DESCRIPTION
FPBGA
LSP4_TRST
OUT
81
A7
IEEE1149.1 Test Reset on LSP 4
when PASS_THRU_ENABLE is
HIGH.
Buffered version
of signal present
on primary TRST
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 011.
This pin is tri-stated for all other
combinations.
LSP4_AutoWR
OUT
80
B8
Flash, Memory Auto-Write on LSP 4 Logic '1'
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 011;
PRIM_AutoWR is routed to output.
This pin is tri-stated for all other
combinations.
LSP4_DE
OUT
OUT
83
70
B7
PASS_THRU Debug Enable Output Logic '1'
on LSP 4.
Active low output when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 011.
This pin is high for all other
combinations.
LSP5_TCK
D10
IEEE1149.1 Test Clock on LSP 5
when PASS_THRU_ENABLE is
HIGH.
Buffered version
of signal present
on primary TCK
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is tri-stated for all other
combinations.
LSP5_TMS
OUT
69
D9
IEEE1149.1 Test Mode Select on
LSP 5 when PASS_THRU_ENABLE
is HIGH.
Logic '1'
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is tri-stated for all other
combinations.
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ETC [ ETC ]
