Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 63: CPRI Protocol Characteristics
Description
Line Rate (Mb/s)
Min
Max
Units
CPRI Transmitter Jitter Generation
614.4
1228.8
2457.6
3072.0
4915.2
6144.0
–
–
–
–
–
–
0.35
0.35
0.35
0.35
0.3
UI
UI
UI
UI
UI
UI
Total transmitter jitter
0.3
CPRI Receiver Frequency Jitter Tolerance
Total receiver jitter tolerance
614.4
1228.8
0.65
0.65
0.65
0.65
0.60
0.60
–
–
–
–
–
–
UI
UI
UI
UI
UI
UI
2457.6
3072.0
4915.2(1)
6144.0(1)
Notes:
1. Tested to CEI-6G-SR.
Integrated Interface Block for PCI Express Designs Switching Characteristics
More information and documentation on solutions for PCI Express designs can be found at:
www.xilinx.com/products/technology/pci-express.html
Table 64: Maximum Performance for PCI Express Designs
Speed Grade
Symbol
Description
1.0V
0.95V
-1LI
0.9V
Units
-3
-2/-2LE
250.00
250.00
250.00
250.00
-1
-2LE
FPIPECLK
Pipe clock maximum frequency
User clock maximum frequency
User clock 2 maximum frequency
DRP clock maximum frequency
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
MHz
MHz
MHz
MHz
FUSERCLK
FUSERCLK2
FDRPCLK
Notes:
1. Refer to PG054, 7 Series FPGAs Integrated Block for PCI Express Product Guide for specific supported core configurations.
DS181 (v1.25) June 18, 2018
www.xilinx.com
Product Specification
56