WM8352
Production Data
24.3 SECOND-LEVEL INTERRUPTS
The following sections define the second-level interrupt status and control bits associated with each
of the first-level bits defined in Table 142.
24.3.1 OVERCURRENT INTERRUPT
The first-level OC_INT interrupt comprises one second-level interrupt for the limit switch. This status
bit is in Register R29 and its mask bit is in Register R37, as defined in Table 143.
ADDRESS
BIT
LABEL
OC_LS_EINT
DESCRIPTION
Limit Switch Over-current interrupt.
(Rising Edge triggered)
R29 (1Dh)
15
Over Current
Interrupt
Status
Note: This bit is cleared once read.
R37 (25h)
15
IM_OC_LS_EINT
Interrupt mask.
Over Current
Interrupt Mask
0 = Do not mask interrupt.
1 = Mask interrupt.
When IM_OC_LS_EINT is set to 1, then
OC_LS_EINT in R29 does not trigger an
OC_INT interrupt when set. The default
value is 0 (unmasked).
Table 143 Over-Current Interrupt
24.3.2 UNDERVOLTAGE INTERRUPTS
The first-level UV_INT interrupt comprises several second-level interrupts for the DC-DCs and LDOs.
Each of these has a status bit in Register R28 and a mask bit in Register R36, as defined in Table
144.
ADDRESS
BIT
LABEL
UV_LDO4_EINT
DESCRIPTION
LDO4 Under-voltage interrupt.
(Rising Edge triggered)
R28 (1Ch)
11
Under Voltage
Interrupt
Status
Note: This bit is cleared once read.
LDO3 Under-voltage interrupt.
(Rising Edge triggered)
10
9
UV_LDO3_EINT
UV_LDO2_EINT
UV_LDO1_EINT
UV_DC6_EINT
UV_DC5_EINT
UV_DC4_EINT
UV_DC3_EINT
UV_DC2_EINT
Note: This bit is cleared once read.
LDO2 Under-voltage interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
LDO1 Under-voltage interrupt.
(Rising Edge triggered)
8
Note: This bit is cleared once read.
DCDC6 Under-voltage interrupt.
(Rising Edge triggered)
5
Note: This bit is cleared once read.
DCDC5 Under-voltage interrupt.
(Rising Edge triggered)
4
Note: This bit is cleared once read.
DCDC4 Under-voltage interrupt.
(Rising Edge triggered)
3
Note: This bit is cleared once read.
DCDC3 Under-voltage interrupt.
(Rising Edge triggered)
2
Note: This bit is cleared once read.
DCDC2 Under-voltage interrupt.
(Rising Edge triggered)
1
Note: This bit is cleared once read.
PD, February 2011, Rev 4.4
200
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
