WM8352
Production Data
24.3.7 AUXADC AND DIGITAL COMPARATOR INTERRUPTS
The first-level AUXADC_INT interrupt comprises several second-level interrupts for the auxiliary ADC
and associated digital comparators. Each of these has a status bit in Register R26 and a mask bit in
Register R34, as defined in Table 149.
ADDRESS
BIT
LABEL
DESCRIPTION
Auxiliary data ready.
R26 (1Ah)
8
AUXADC_DATARDY_EINT
Interrupt
Status 2
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP4 interrupt.
7
6
AUXADC_DCOMP4_EINT
AUXADC_DCOMP3_EINT
AUXADC_DCOMP2_EINT
AUXADC_DCOMP1_EINT
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP3 interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP2 interrupt.
5
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP1 interrupt.
4
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
R34 (22h)
8:4
“IM_” + name of respective
bit in R26
Interrupt
Status 2 Mask
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R34 enables or masks the
corresponding bit in R26. The default
value for these bits is 0 (unmasked).
Table 149 AUXADC Interrupts
24.3.8 RTC INTERRUPTS
The first-level RTC_INT interrupt comprises three second-level interrupts for the Real Time Clock.
Each of these has a status bit in Register R25 and a mask bit in Register R33, as defined in Table
150.
ADDRESS
BIT
LABEL
DESCRIPTION
RTC periodic interrupt.
R25 (19h)
7
RTC_PER_EINT
Interrupt Status
1
(Rising Edge triggered)
Note: This bit is cleared once read.
RTC 1s rollover complete (1Hz tick).
(Rising Edge triggered)
6
5
RTC_SEC_EINT
RTC_ALM_EINT
Note: This bit is cleared once read.
RTC alarm signalled.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
R33 (21h)
7:5
“IM_” + name of respective
bit in R25
Interrupt Status
1 Mask
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R33 enables or masks the
corresponding bit in R25. The default
value for these bits is 0 (unmasked).
Table 150 RTC Interrupts
PD, February 2011, Rev 4.4
204
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