Production Data
WM8352
ADDRESS
BIT
LABEL
DESCRIPTION
R26 (1Ah)
0
SYS_WDOG_TO_EINT
Watchdog timeout has occurred.
(Rising Edge triggered)
Interrupt Status
2
Note: This bit is cleared once read.
Mask bit for Watchdog timer interrupt
R34 (22h)
0
IM_SYS_WDOG_TO_EINT
Interrupt Status
2 Mask
When set to 1, IM_SYS_WDOG_TO_EINT
masks SYS_WDOG_TO_EINT in R26 and
does not trigger an SYS_INT interrupt when
SYS_WDOG_TO_EINT is set).
Table 140 Watchdog Timer Interrupts
Note that, if GPIO9 is configured as VCC_FAULT output (GP9_FN = 0001, GP9_DIR = 0), then the
Watchdog Timer will be configured to expect a HEARTBEAT reset trigger. In this configuration, the
Watchdog Reset will never occur and the system may lock up if the Watchdog Mode is enabled.
The Watchdog Timer function cannot be supported if GPIO9 is configured as VCC_FAULT output.
Either the GPIO9 must be reconfigured as some other function, or the Watchdog Timer must remain
disabled.
PD, February 2011, Rev 4.4
197
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
