VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48
VSC8025/VSC8026
Mux/Demux and Section Terminator IC Chipset
VSC8025 AC Timing Characteristics
Figure 4: VSC8025 Clock and Data Interface (Serial Transmit & Parallel Transmit Mode)
VSC8025
TXSOUT+
TXSOUT-
Q D
Serial
Transmit
TXSCLKOUT+
TXSCLKOUT-
TXINA[7:0]
Q D
Q D
TXCLK+
TXCLK-
TXFPIN[A:D]
TXCLKIN
TXPOUT[7:0]
Q D
Q D
Parallel
Transmit
TXFPOUT
TXPCLKOUT+
TXPCLKOUT-
TXPCLKIN+
TXPCLKIN-
Note: 1). Parallel transmit mode bypasses the 8:1 MUX, and serial transmit mode uses the 8:1 MUX.
2). TXINB [7:0], TXINC [7:0], and TXIND [7:0] inputs have been omitted for simplicity.
2). In serial transmit mode, SELPCLK = logic “0”.
3). In parallel transmit mode, SELPCLK = logic “1”.
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VITESSE SEMICONDUCTOR CORPORATION
G52182-0, Rev. 4.0
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
1/5/00
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
