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VSC7111XJW 参数 Datasheet PDF下载

VSC7111XJW图片预览
型号: VSC7111XJW
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom IC, PQCC32,]
分类和应用:
文件页数/大小: 55 页 / 894 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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Advance Product Information  
Subject to Change  
VSC7111 Datasheet  
Functional Descriptions  
Table 3.  
Input EQ Static Mode Settings (continued)  
ISE1  
LOPWR SA3_ SSB SA2_MISO SDA_ MOSI Gain1 Gain2 Short  
ISE1  
Long  
ISE2  
Short  
ISE2  
Long  
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
01100 10100 10000  
01100 10000 10000  
01000 10000 11000  
11111 11111 00000  
11011 11111 00100  
10110 11011 01000  
10100 10110 01010  
10000 10110 01100  
01100 10100 10000  
01100 10000 10000  
01000 10000 11000  
00011  
00100  
01000  
00000  
00000  
00001  
00011  
00011  
00011  
00100  
01000  
01000  
01100  
10000  
00000  
00000  
00100  
01000  
01000  
01000  
01100  
10000  
00011  
00011  
00100  
00000  
00000  
00000  
00001  
00001  
00011  
00011  
00100  
Output amplitude and equalization (pre-emphasis) are controlled in the static  
configuration mode by tying the SA1 and SA0 pins high or low. The following table  
shows the static pin settings and equivalent internal register values.  
Table 4.  
Output EQ Static Mode Settings  
Voltage PE1  
LOPWR SA1 SA0 Swing Decay  
PE1  
Level  
PE2  
Decay  
PE2  
Level  
Description  
Nominal  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1001  
1010  
1010  
1100  
1111  
1000  
1001  
1010  
000  
000  
100  
000  
100  
000  
000  
000  
000  
000  
000  
110  
001  
000  
000  
110  
100  
000  
000  
100  
001  
000  
000  
100  
001  
110  
000  
100  
000  
000  
000  
000  
Hi spd Hi EQ  
8G Hi EQ  
Lrg Low EQ  
Video Mode  
Low Pwr  
6G Hi EQ  
Lrg Low EQ  
Inputs and outputs are powered on or off in the static configuration depending on the  
status of the MUXCFG and SCK pins in conjunction with the LOS indication and PCIe  
receiver detect state machine status. The following table shows the various possibilities  
of the I/O power state in static mode. FLOSn = 1 indicates that an LOS condition lasting  
longer than 1 ms has been detected at input n.  
Table 5.  
Power State of Inputs and Outputs in Static Mode  
MUXCFG = 1 MUXCFG = 0 and SCK = 0  
MUX/fanout Non-PCIe buffer  
MUXCFG = 0 and SCK = 1  
PCIe buffer mode  
I/O  
mode  
mode  
A0/A0N Not (FLOS0)  
A1/A1N Not (FLOS1)  
A2/A2N Not (FLOS2)  
A3/A3N Not (FLOS3)  
Y0/Y0N Always ON  
Not (FLOS0)  
Not (FLOS1)  
Not (FLOS2)  
Not (FLOS3)  
Not (FLOS0)  
Depends on Rx detect state machine  
Depends on Rx detect state machine  
Depends on Rx detect state machine  
Depends on Rx detect state machine  
Always ON  
Revision 2.0  
September 2010  
Confidential  
Page 14  
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