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VSC7111 Datasheet
Functional Descriptions
The input signal equalization (ISE) on the VSC7111 helps to combat the intersymbol
interference (ISI) of high-speed data as it passes through lossy media. This is
accomplished by increasing the relative sensitivity of the receive circuits to the high
frequency components of the data edges and works to reverse, in part or in whole, the
degradation of signal quality due to propagation through the transmission media.
The VSC7111 incorporates independent input signal equalizers (ISEs) on all four inputs.
The following illustration shows the ISE architecture, which consists of two identical
equalization stages (ISE 1 and ISE 2) connected in a series.
Figure 3.
Input Signal Equalizer Architecture
ISE 1
ISE 2
Short
Short
Limiting
Amp
Long
Gain
Long
Gain
AEQ
Tap 1
AEQ
Tap 2
Each stage has three amplifiers in parallel, and each amplifier has a different gain
versus frequency profile. The short time constant amplifiers are high-pass, with less
than 3 dB of gain below 300 MHz, and a maximum gain of approximately 30 dB at
5 GHz. The long time constant amplifiers are also high-pass, with less than 3 dB of gain
below 50 MHz, and a maximum gain of approximately 30 dB at 2 GHz. The gain
amplifiers have a flat gain profile over the frequency range. Adjustment of the ISE
short, long, and gain settings enables equalization over a wide range of channel
characteristics.
Each ISE stage can be deactivated or set to one of 31 levels, depending on the
magnitude of the signal filtering that occurred during propagation. The bits that control
the ISE settings are in the input ISE registers (addresses 16'h-19'h). For more
information about the input ISE registers, see “Individual Registers,” page 27.
In static and programmable modes, the EQMAN pin controls whether automatic or
manual input equalization is used. In static mode, EQMAN = 0 sets automatic
(adaptive) equalization (AEQ) on all inputs. In programmable mode, the CAEQENA bit
at register page 15'h (per channel) or the GAEQENA bit in register 60'h (global) can be
used to invert the functionality of EQMAN.
The AEQ compares the average voltage amplitudes at the input and output of the
limiting amplifier. The AEQ algorithm assumes that the high-frequency content of the
signal is reduced by the characteristics of the channel, where longer channels result in
greater high-frequency losses. As the high-frequency content is reduced, the average
voltage amplitude at the input to the limiting amplifier will decrease relative to the
average voltage amplitude at the output of the limiting amplifier.
Revision 2.0
September 2010
Confidential
Page 18
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
