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VSC7111XJW 参数 Datasheet PDF下载

VSC7111XJW图片预览
型号: VSC7111XJW
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom IC, PQCC32,]
分类和应用:
文件页数/大小: 55 页 / 894 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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Advance Product Information  
Subject to Change  
VSC7111 Datasheet  
Functional Descriptions  
important to ensure that the SCK pin is properly connected. In static configuration  
mode, the SCK pin should be tied high or low. In the programming mode, SCK must be  
free to toggle high and low under control of the programming interface.  
When MUXCFG = 0 in static configuration (buffer mode), SCK = 0 disables automatic  
PCIe receiver detect, and SCK = 1 enables automatic PCIe receiver detect. When  
MUXCFG = 1 (MUX/fanout mode), SCK = 0 or 1 determines which two of the inputs  
become primary inputs for the redundancy function. For redundancy, the primary inputs  
are each connected to two outputs when they are receiving a signal, but the secondary  
inputs become active if the primary inputs do not receive a signal for more than 1 ms  
(LOS is asserted for more than 1 ms). SCK = 0 connects input A0 to outputs Y0 and Y1  
and input A2 to outputs Y2 and Y3 as the primary connections, with inputs A1 and A3  
as the secondary inputs. SCK = 1 reverses the primary/secondary assignments so that  
A1 and A3 are primary while A0 and A2 are secondary. Primary/secondary input  
assignment changes (by changing the state of the SCK pin) are prevented (locked out)  
by internal logic when the change would cause connection to an input that has no  
signal.  
The following table lists the static mode configuration settings for the VSC7111 device.  
Table 2.  
Static Mode Mapping  
Mode Description  
MUXCFG SCK EQMAN  
Buffer, non-PCIe, auto EQ  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Buffer, non-PCIe, manual EQ  
Buffer, PCIe, auto EQ  
Buffer, PCIe, manual EQ  
MUX/fanout, non-PCIe, auto EQ, even inputs primary  
MUX/fanout, non-PCIe, manual EQ, even inputs primary  
MUX/fanout, non-PCIe, auto EQ, odd inputs primary  
MUX/fanout, non-PCIe, manual EQ, odd inputs primary  
The EQMAN pin controls the state of the automatic (adaptive) input equalizer.  
EQMAN = 0 turns on automatic input equalization, ignoring the manual equalization  
control settings. EQMAN = 1 disables automatic equalization and uses the manual  
equalization control settings.  
Manual input equalization is controlled using the SDA_MOSI, SA2_MISO, and SA3_SSB  
pins in the static configuration mode (they are used for serial data addressing in the  
programming modes). In conjunction with the low power pin (LOPWR), 16 different  
combinations of input equalization are selectable by tying the pins high or low. The  
following table shows the static pin settings and equivalent internal register values.  
Table 3.  
Input EQ Static Mode Settings  
ISE1  
LOPWR SA3_ SSB SA2_MISO SDA_ MOSI Gain1 Gain2 Short  
ISE1  
Long  
ISE2  
Short  
ISE2  
Long  
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
11111 11111 00000  
11011 11111 00100  
10110 11011 01000  
10100 10110 01010  
10000 10110 01100  
00000  
00000  
00001  
00011  
00011  
00000  
00000  
00100  
01000  
01000  
00000  
00000  
00000  
00001  
00001  
Revision 2.0  
September 2010  
Confidential  
Page 13  
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