TPS929160-Q1
ZHCSNG0 – APRIL 2023
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图 7-29. PWMME0 Register
7
6
5
4
3
2
1
0
PWMOUTE0
R/W-0h
表 7-29. PWMME0 Register Field Descriptions
Bit
7-0
Field
PWMOUTE0
Type
Reset
Description
R/W
0h
8-MSB output PWM duty-cycle setting for OUTE0
7.6.1.10 PWMME1 Register (Offset = 9h) [Reset = 00h]
PWMME1 is shown in 图 7-30 and described in 表 7-30.
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图 7-30. PWMME1 Register
7
6
5
4
3
2
1
0
0
0
PWMOUTE1
R/W-0h
表 7-30. PWMME1 Register Field Descriptions
Bit
7-0
Field
PWMOUTE1
Type
Reset
Description
R/W
0h
8-MSB output PWM duty-cycle setting for OUTE1
7.6.1.11 PWMMF0 Register (Offset = Ah) [Reset = 00h]
PWMMF0 is shown in 图 7-31 and described in 表 7-31.
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图 7-31. PWMMF0 Register
7
6
5
4
3
2
1
PWMOUTF0
R/W-0h
表 7-31. PWMMF0 Register Field Descriptions
Bit
7-0
Field
PWMOUTF0
Type
Reset
Description
R/W
0h
8-MSB output PWM duty-cycle setting for OUTF0
7.6.1.12 PWMMF1 Register (Offset = Bh) [Reset = 00h]
PWMMF1 is shown in 图 7-32 and described in 表 7-32.
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图 7-32. PWMMF1 Register
7
6
5
4
3
2
1
PWMOUTF1
R/W-0h
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Product Folder Links: TPS929160-Q1
English Data Sheet: SLVSG60
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