TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 7-26
Main PLL Controller/SRIO/HyperLink/PCIe Clock Input Timing Requirements (1) (Part 2 of 3)
(see Figure 7-19 and Figure 7-20)
No.
Min
Max Unit
0.55*tc(CORECLKN)
3
2
2
3
4
4
4
4
5
5
tw(CORECLKN)
Pulse width _ CORECLKN high
0.45*tc(CORECLKN)
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
tw(CORECLKN)
Pulse width _ CORECLKN low
0.45*tc(CORECLKN)
0.55*tc(CORECLKN)
tw(CORECLKP)
Pulse width _ CORECLKP high
0.45*tc(CORECLKP)
0.55*tc(CORECLKP)
tw(CORECLKP)
Pulse width _ CORECLKP low
0.45*tc(CORECLKP)
0.55*tc(CORECLKP)
tr(CORECLKN_250mv)
tf(CORECLKN_250mv)
tr(CORECLKP_250mv)
tf(CORECLKP_250mv)
tj(CORECLKN)
Transition time _ CORECLKN rise time (250 mV)
Transition time _ CORECLKN fall time (250 mV)
Transition time _ CORECLKP rise time (250 mV)
Transition time _ CORECLKP fall time (250 mV)
Jitter, peak_to_peak _ periodic CORECLKN
Jitter, peak_to_peak _ periodic CORECLKP
50
50
50
50
350
350
350
350
100
100
tj(CORECLKP)
SRIOSGMIICLK[P:N]
1
1
3
2
2
3
4
tc(SRIOSMGMIICLKN)
tc(SRIOSMGMIICLKP)
tw(SRIOSMGMIICLKN)
tw(SRIOSMGMIICLKN)
tw(SRIOSMGMIICLKP)
tw(SRIOSMGMIICLKP)
Cycle time _ SRIOSMGMIICLKN cycle time
Cycle time _ SRIOSMGMIICLKP cycle time
Pulse width _ SRIOSMGMIICLKN high
Pulse width _ SRIOSMGMIICLKN low
Pulse width _ SRIOSMGMIICLKP high
Pulse width _ SRIOSMGMIICLKP low
3.2
3.2
6.4
6.4
ns
ns
ns
ns
ns
ns
0.45*tc(SRIOSGMIICLKN) 0.55*tc(SRIOSGMIICLKN)
0.45*tc(SRIOSGMIICLKN) 0.55*tc(SRIOSGMIICLKN)
0.45*tc(SRIOSGMIICLKP) 0.55*tc(SRIOSGMIICLKP)
0.45*tc(SRIOSGMIICLKP) 0.55*tc(SRIOSGMIICLKP)
tr(SRIOSMGMIICLKN_25 Transition time _ SRIOSMGMIICLKN rise time (250 mV)
0mv)
50
50
50
50
350
350
350
350
ps
ps
ps
ps
4
4
4
tf(SRIOSMGMIICLKN_25 Transition time _ SRIOSMGMIICLKN fall time (250 mV)
0mv)
tr(SRIOSMGMIICLKP_25 Transition time _ SRIOSMGMIICLKP rise time (250 mV)
0mv)
tf(SRIOSMGMIICLKP_25 Transition time _ SRIOSMGMIICLKP fall time (250 mV)
0mv)
5
5
5
tj(SRIOSMGMIICLKN)
tj(SRIOSMGMIICLKP)
tj(SRIOSMGMIICLKN)
Jitter, peak_to_peak _ periodic SRIOSMGMIICLKN
Jitter, peak_to_peak _ periodic SRIOSMGMIICLKP
4
4
ps,RMS
ps,RMS
Jitter, peak_to_peak _ periodic SRIOSMGMIICLKN (SRIO
not used)
8
8
ps,RMS
ps,RMS
5
tj(SRIOSMGMIICLKP)
Jitter, peak_to_peak _ periodic SRIOSMGMIICLKP (SRIO
not used)
HyperLinkCLK[P:N]
Cycle time _ MCMCLKN cycle time
Cycle time _ MCMCLKP cycle time
Pulse width _ MCMCLKN high
1
1
3
2
2
3
4
4
4
4
5
5
tc(MCMCLKN)
3.2
6.4
ns
ns
tc(MCMCLKP)
3.2
6.4
tw(MCMCLKN)
0.45*tc(MCMCLKN)
0.55*tc(MCMCLKN)
ns
tw(MCMCLKN)
Pulse width _ MCMCLKN low
0.45*tc(MCMCLKN)
0.55*tc(MCMCLKN)
ns
tw(MCMCLKP)
Pulse width _ MCMCLKP high
0.45*tc(MCMCLKP)
0.55*tc(MCMCLKP)
ns
tw(MCMCLKP)
Pulse width _ MCMCLKP low
0.45*tc(MCMCLKP)
0.55*tc(MCMCLKP)
ns
tr(MCMCLKN_250mv)
tf(MCMCLKN_250mv)
tr(MCMCLKP_250mv)
tf(MCMCLKP_250mv)
tj(MCMCLKN)
Transition time _ MCMCLKN rise time (250mV)
Transition time _ MCMCLKN fall time (250mV)
Transition time _ MCMCLKP rise time (250mV)
Transition time _ MCMCLKP fall time (250mV)
Jitter, peak_to_peak _ periodic MCMCLKN
Jitter, peak_to_peak _ periodic MCMCLKP
PCIECLK[P:N]
50
50
50
50
350
350
350
350
4
ps
ps
ps
ps
ps,RMS
ps,RMS
tj(MCMCLKP)
4
Copyright 2012 Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 143
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