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LM5116 参数 Datasheet PDF下载

LM5116图片预览
型号: LM5116
PDF下载: 下载PDF文件 查看货源
内容描述: LM5116宽范围同步降压控制器 [LM5116 Wide Range Synchronous Buck Controller]
分类和应用: 控制器
文件页数/大小: 37 页 / 1452 K
品牌: TI [ TEXAS INSTRUMENTS ]
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LM5116  
SNVS499G FEBRUARY 2007REVISED MARCH 2013  
www.ti.com  
VCC CAPACITOR  
The primary purpose of the VCC capacitor (CVCC) is to supply the peak transient currents of the LO driver and  
bootstrap diode (D1) as well as provide stability for the VCC regulator. These current peaks can be several  
amperes. The recommended value of CVCC should be no smaller than 0.47 µF, and should be a good quality, low  
ESR, ceramic capacitor located at the pins of the IC to minimize potentially damaging voltage transients caused  
by trace inductance. A value of 1 µF was selected for this design.  
BOOTSTRAP CAPACITOR  
The bootstrap capacitor (CHB) between the HB and SW pins supplies the gate current to charge the high-side  
MOSFET gate at each cycle’s turn-on as well as supplying the recovery charge for the bootstrap diode (D1).  
These current peaks can be several amperes. The recommended value of the bootstrap capacitor is at least 0.1  
µF, and should be a good quality, low ESR, ceramic capacitor located at the pins of the IC to minimize potentially  
damaging voltage transients caused by trace inductance. The absolute minimum value for the bootstrap  
capacitor is calculated as:  
Qg  
CHB  
í
DVHB  
where  
Qg is the high-side MOSFET gate charge  
ΔVHB is the tolerable voltage droop on CHB  
(21)  
CHB is typically less than 5% of VCC. A value of 1 µF was selected for this design.  
SOFT START CAPACITOR  
The capacitor at the SS pin (CSS) determines the soft-start time, which is the time for the reference voltage and  
the output voltage to reach the final regulated value. The soft-start time tSS should be substantially longer than  
the time required to charge COUT to VOUT at the maximum output current. To meet this requirement:  
tSS > VOUT x COUT / (ICURRENT LIMIT – IOUT  
)
(22)  
The value of CSS for a given time is determined from:  
tSS x 10 mA  
CSS  
=
1.215V  
(23)  
For this application, a value of 0.01 µF was chosen for a soft-start time of 1.2 ms.  
OUTPUT VOLTAGE DIVIDER  
RFB1 and RFB2 set the output voltage level, the ratio of these resistors is calculated from:  
RFB2  
RFB1  
VOUT  
- 1  
=
1.215V  
(24)  
RFB1 is typically 1.21 kfor a divider current of 1 mA. The divider current can be reduced to 100 µA with  
RFB1=12.1 k. For the 5V output design example used here, RFB1 = 1.21 kand RFB2 = 3.74 k.  
UVLO DIVIDER  
A voltage divider and filter can be connected to the UVLO pin to set a minimum operating voltage VIN(MIN) for the  
regulator. If this feature is required, the following procedure can be used to determine appropriate resistor values  
for RUV2, RUV1 and CFT.  
1. RUV2 must be large enough such that in the event of a current limit, the internal UVLO switch can pull UVLO  
< 200 mV. This can be accomplished if: RUV2 > 500 x VIN(MAX)Where VIN(MAX) is the maximum input voltage  
and RUV2 is in ohms.  
2. With  
an  
appropriate  
value  
for  
RUV2  
,
RUV1  
can  
be  
selected  
using  
the  
following  
RUV2  
VIN(MIN) + (5 mA x RUV2) - 1.215  
equation:R  
Where VIN(MIN) is the desired shutdown voltage.  
UV1 = 1.215 x  
3. Capacitor CFT provides filtering for the divider and determines the off-time of the “hiccup” duty cycle during  
current limit. When CFT is used in conjunction with the voltage divider, a diode across the top resistor should  
22  
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