DRV8301-Q1
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SLOS842 –SEPTEMBER 2013
SPI CHARACTERISTICS (Slave Mode Only) (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
tHD_SDI
tD_SDO
SDI input data hold time
30
ns
SDO output data delay time, CLK high to
SDO valid
CL = 20 pF
20
ns
tHD_SDO
tSU_SCS
tHD_SCS
SDO output data hold time
SCS setup time
40
50
50
ns
ns
SCS hold time
SCS minimum high time before SCS active
low
tHI_SCS
tACC
40
ns
ns
ns
SCS access time, SCS low to SDO out of
high impedance
10
10
SCS disable time, SCS high to SDO high
impedance
tDIS
t
HI_SCS
_
t
HD_SCS
t
SU_SCS
SCS
SCLK
SDI
t
CLK
t
t
CLKH
CLKL
MSB in
must be valid
LSB
LSB
(
)
t
t
HD_SDI
SU_SDI
SDO
MSB out (is valid)
Z
Z
t
t
t
t
ACC
DIS
D_SDO
HD_SDO
Figure 2. SPI Slave Mode Timing Definition
1
2
3
4
X
15
16
SCS
SCLK
LSB
LSB
MSB
MSB
SDI
SDO
Receive
latch Points
Figure 3. SPI Slave Mode Timing Diagram
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