UPSD3212C, UPSD3212CV
External Chip Select
The CPLD also provides two External Chip Select
(ECS1-ECS2) outputs on Port D pins that can be
used to select external devices. Each External
Chip Select (ECS1-ECS2) consists of one product
term that can be configured active High or Low.
The output enable of the pin is controlled by either
the output enable product term or the Direction
Register. (See Figure 58.)
Figure 58. Port D External Chip Select Signals
ENABLE (.OE)
DIRECTION
REGISTER
PD1 PIN
ECS1
PT1
POLARITY
BIT
ENABLE (.OE)
DIRECTION
REGISTER
PD2 PIN
ECS2
PT2
POLARITY
BIT
AI06607
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