Electrical characteristics
STM32F405xx, STM32F407xx
(1)(2)
Table 76. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
th(A_NWE)
tv(BL_NE)
Address hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NWE high
Data to FSMC_NEx low to Data valid
Data hold time after FSMC_NWE high
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
THCLK– 2
-
ns
ns
ns
ns
ns
ns
-
1.5
th(BL_NWE)
tv(Data_NE)
th(Data_NWE)
tv(NADV_NE)
tw(NADV)
THCLK– 1
-
-
THCLK+3
THCLK–1
-
-
-
2
THCLK+0.5 ns
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Figure 57. Asynchronous multiplexed PSRAM/NOR read waveforms
t
w(NE)
FSMC_NE
t
t
h(NE_NOE)
v(NOE_NE)
FSMC_NOE
t
w(NOE)
FSMC_NWE
t
tv(A_NE)
h(A_NOE)
FSMC_A[25:16]
Address
tv(BL_NE)
t
h(BL_NOE)
FSMC_NBL[1:0]
NBL
t
h(Data_NE)
t
su(Data_NE)
t
t
t
h(Data_NOE)
v(A_NE)
su(Data_NOE)
Address
Data
FSMC_AD[15:0]
FSMC_NADV
t
th(AD_NADV)
v(NADV_NE)
t
w(NADV)
ai14892b
(1)(2)
Table 77. Asynchronous multiplexed PSRAM/NOR read timings
Symbol
Parameter
FSMC_NE low time
Min
Max
3THCLK+1
Unit
tw(NE)
3THCLK–1
ns
ns
ns
ns
ns
tv(NOE_NE) FSMC_NEx low to FSMC_NOE low
tw(NOE) FSMC_NOE low time
th(NE_NOE) FSMC_NOE high to FSMC_NE high hold time
2THCLK–0.5 2THCLK+0.5
THCLK–1
THCLK+1
0
-
-
tv(A_NE)
FSMC_NEx low to FSMC_A valid
3
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STMICROELECTRONICS [ ST ]
