Note: SCI events are those illustrated in the diagram as the PM1 and GPE1 registers.
ALL 42x
PME_STS
IO_PME#
PME Events
GPE1_STS1Reg GPE1_EN1Reg
PME_EN
.
.
.
ALL_PME
+
nRI1
KDAT
PME_STSx,
PME_ENx
Registers
MDAT
SPEKEY
GP23
+
GP34
SCI_EN
GP35
SMI#
GPE1_STS2Reg GPE1_EN2Reg
SMI_SCI_ENB
GP50/nRI2
.
.
.
.
.
.
.
.
.
SLP_CTRL
SLP_EN
GP57
Note: SLP_CTRL=1
disables sleep
PM1_STS2Reg PM11_EN2Reg
when the SLP_EN
bit is written to ‘1’.
PWRBTN
Note: the PWRBTN is always enabled for
wakeup
RTC
These events are blocked from waking the
system if the PWRBTNOR_STS bit is set.
Other Wakeup Events:
•AL_REM_EN
To Wakeup Logic
(Power Supply Control)
•VTR_POR if VTR_POR_EN bit is set
•VTR POR if the nPS_ON pin was active low prior to the loss of VTR
and neither the VTR_POR_OFF bit nor the VTR_POR_EN bit is set
FIGURE 12 − WAKEUP LOGIC
Notice in the diagram above that any event enabled in the PM1 or GPE registers will always generate a signal to
initiate the wakeup logic to the power supply (i.e. activate nPS_ON). In addition, the SCI registers are able to
generate a PME or an SMI if enabled. The following is a list of options for generating PMEs and SMIs.
1. PME status and enable registers. (asserts IO_PME# only)
-
To generate a PME, enable individual PME events in the PME_ENx registers and enable the PME_EN
register. The PME_EN register enables the chip to assert the IO_PME# signal.
2. SMI status and enable registers. (asserts IO_SMI# only)
-
To generate an SMI, enable individual SMI events in the SMI_ENx registers and enable Bit[7] EN_SMI in the
SMI_EN2 register at offset 17h. The EN_SMI bit enables the chip to assert the IO_SMI# signal.
Note: SMI can be routed to the Serial IRQ by setting Bit[6] of the SMI_EN2 register.
3. PM1 and GPE status and enable registers (ACPI Specific Registers)
-
-
(SCI event = Assert IO_PME# and wake the system)
To generate an SCI event, enable individual events in the PM1 and GPE registers and enable the SCI_EN
bit in the PM1_CNTRL1 register at offset 60h in the Runtime Register block. The SCI_EN bit enables these
events to assert the IO_PME# signal.
Note: If the ALL_PME_EN bit is set, then all enabled PME events will generate an IO_PME# and wake the
system regardless of the PME_EN register.
(assert IO_SMI# and wake the system)
To generate an SMI event through the SCI registers, enable individual events in the PM1 and GPE registers,
set the SCI_EN bit to ‘0’, set the SMI_SCI_ENB bit to ‘0’ found in the PS_CNTRL register, and set the
EN_SMI bit to ‘1’ in the SMI_EN2 registers at offset 17h.
SMSC LPC47S45x
Page 149 of 259
Rev. 06-01-06
DATASHEET
SMSC [ SMSC CORPORATION ]
