Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
When asserted ‘1’, the corresponding PM1 register has been written (see Section 22.5, "Registers").
ACCESS. BUS 1 [D4]
When asserted ‘1’, a start condition or other event was detected on the I2C/SMBus 1.
ACCESS. BUS 2 [D3]
When asserted ‘1’, a start condition or other event was detected on the I2C/SMBus 2.
RTC_ALRM asserted [D0]
The RTC_ALRM Wake-up is an internally generated Low-to-High edge, produced when the RTC time
updates to match the Time Of Day (TOD) alarm setting. This edge will set bit D0 of Wake-up Source
1 Register. Bit D0 will remain set and will only be reset on a read of Wake-up Source 1 Register. If
the Wake-up source register is read before the clock has updated (i.e., RTC still equals the TOD alarm)
bit D0 is reset and stays reset until the next occurrence of a RTC_ALRM Wake-up event.
Table 7.21 Wakeup Source Register 2
N/A
HOST ADDRESS
8051 ADDRESS
POWER
0x7F2B
VCC1
0x00
DEFAULT
BIT
D7
D6
D5
D4
D3
D2
D1
D0
-
-
-
-
-
-
-
-
HOST TYPE
8051 TYPE
R
R
R
R
R
R/WC
R/WC
R
Reserved
Reserved Reserved Reserved Reserved HTIMER WK_
Reserved
BIT DESCRIPTION
timeouts ANYKEY
asserted
Note 7.26 The interrupt source bits in this register are cleared by a writing a “1” to the bit. When an
interrupt source is asserted, a read from the corresponding bit in this register is a logic ‘1’.
Reserved bits are logic zero read only.
HTIMER timeouts [D2]
Asserted when HTIMER=1, the hibernation timer counted down to zero.
WK_ANYKEY asserted [D1]
When unmasked, the WK_ANYKEY will wake the 8051 from the “SLEEP” state when any of the
Keyboard Scan In (KSI) pins goes low. The Boolean equation below defines the WK_ANYKEY function.
WK_ANYKEY = !(KSI0 & KSI1 & KSI2 & KSI3 & KSI4 & KSI5 & KSI6 & KSI7)
nGPWKUP asserted
SMSC LPC47N350
Revision 1.1 (01-14-03)
DATA7S1HEET
SMSC [ SMSC CORPORATION ]
