3858 Group
Address Register contents
Register contents
Address
0016
(1)
Port P0 (P0)
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
001016
001116
001216
001316
001416
001516
001616
001716
001816
001916
001A16
001B16
001C16
001D16
001E16
001F16
002016
002116
002216
002316
002416
002516
002616
002716
(35) Timer Z1 mode register (TZ1M)
(36) Timer Z1 low-order (TZ1L)
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
002816
002916
002A16
002B16
002C16
002D16
002E16
002F16
003016
003416
003516
003616
003816
003916
003A16
003B16
003C16
003D16
003E16
003F16
(PS)
FF16
(2)
Port P0 direction register (P0D)
Port P1 (P1)
FF16
0016
(3)
(37) Timer Z1 high-order (TZ1H)
(4)
Port P1 direction register (P1D)
Port P2 (P2)
(38) Timer Z2 mode register (TZ2M)
(39) Timer Z2 low-order (TZ2L)
FF16
(5)
FF16
(6)
Port P2 direction register (P2D)
Port P3 (P3)
(40) Timer Z2 high-order (TZ2H)
(7)
0 0 1 1 0 0 1 1
(41) Timer 12, X count source selection register (T12XCSS)
(42) Timer Y, Z1 count source selection register (TYZ1CSS)
(43) Timer Z2 count source selection register (TZ2CSS)
(44) AD control register (ADCON)
(45) AD conversion register (AD)
(8)
Port P3 direction register (P3D)
Port P4 (P4)
0 0 1 1 0 0 1 1
0 0 0 0 0 0 1 1
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
(34)
Port P4 direction register (P4D)
Port P0 pull-up control register (PULL0)
Port P1 pull-up control register (PULL1)
Port P2 pull-up control register (PULL2)
Port P3 pull-up control register (PULL3)
Port P4 pull-up control register (PULL4)
Serial I/O2 control register 1 (SIO2CON1)
Serial I/O2 control register 2 (SIO2CON2)
Serial I/O2 register (SIO2)
Transmit/Receive buffer register (TB/RB)
Serial I/O1 status register (SIOSTS)
Serial I/O1 control register (SIOCON)
UART control register (UARTCON)
Baud rate generator (BRG)
PWM control register (PWMCON)
PWM prescaler (PREPWM)
PWM register (PWM)
0 0 0 1 0 0 0 0
X X X X X X X X
0016
0016
(46) Interrupt source selection register (INTSEL)
(47) MISRG
0 0 1 1 1 1 1 1
0016
(48) Watchdog timer control register (WDTCON)
(49) Interrupt edge selection register (INTEDGE)
(50) CPU mode register (CPUM)
0 1 0 0 1 0 0 0
0016
(51) Interrupt request register 1 (IREQ1)
(52) Interrupt request register 2 (IREQ2)
(53) Interrupt control register 1 (ICON1)
(54) Interrupt control register 2 (ICON2)
Processor status register
0 0 0 0 0 1 1 1
X X X X X X X X
0016
0016
X X X X X X X X
1 0 0 0 0 0 0 0
0016
X X X X X 1 X X
FFFD16 contents
FFFC16 contents
0016
Program counter
(PCH)
1 1 1 0 0 0 0 0
X X X X X X X X
0016
(PC
L
)
X X X X X X X X
X X X X X X X X
Prescaler 12 (PRE12)
FF16
0116
FF16
0016
FF16
FF16
FF16
FF16
Timer 1 (T1)
Timer 2 (T2)
Timer XY mode register (TM)
Prescaler X (PREX)
Timer X (TX)
Prescaler Y (PREY)
Timer Y (TY)
Note : X : Not fixed
Since the initial values for other than above mentioned registers and
RAM contents are indefinite at reset, they must be set.
Fig. 55 Internal status at reset
Rev.1.10 Apr 3, 2006 page 55 of 75
REJ03B0139-0110