Table 1.2 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
248 A1
EXTAL
I
External input
clock/crystal
resonator
249 C5
NC
250 D16 NC
251 H17 NC
252 H18 NC
253 N3
254 N4
255 U4
NC
NC
NC
256 V18 NC
I:
Input
O:
I/O:
Output
Input/output
Power: Power supply
Notes: 1. Except in hardware standby mode, supply power to all power pins. In hardware standby
mode, supply power to RTC as a minimum.
2. Power must be supplied to VDD-PLL1/2 and VSS-PLL1/2 regardless of whether or not
the on-chip PLL circuits are used.
3. Power must be supplied to VDD-CPG and VSS-CPG regardless of whether or not the
on-chip crystal resonator is used.
4. Power must be supplied to VDD-RTC and VSS-RTC regardless of whether or not the
on-chip RTC is used.
5. VSSQ, VSS, VSS-RTC, VSS-PLL1/2, and VSS-CPG are connected inside the package.
6. In the SH7750S and SH7750R, at least the RTC power supply must be supplied in
hardware standby mode.
7. NC pins must be left completely open, and not connected to a power supply, GND, etc.
*
*
1 CKIO2 is not connected to PLL2.
2 Hardware standby request (SH7750S and SH7750R). In the SH7750, pull up to 3.3 V.
Rev. 6.0, 07/02, page 22 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
