Table 1.2 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
225 D8
226 A8
227 B8
228 A7
A1
O
O
O
I
Address
Status
Status
STATUS0
STATUS1
MD6/
,2,649
Mode/,2,649 MD6
,2,649
(PCMCIA)
229 C9
230 D9
231 B7
VDDQ
Power IO VDD (3.3 V)
Power IO GND (0 V)
VSSQ
$6(%5./
I/O
Pin break/
acknowledge
(H-UDI)
BRKACK
232 A6
TDO
O
Data out
(H-UDI)
233 C7
234 D7
VDD
VSS
Power Internal VDD
Power Internal GND
(0 V)
235 B6
236 A5
237 B5
238 C4
239 C3
TMS
I
I
I
I
I
Mode
(H-UDI)
TCK
Clock
(H-UDI)
TDI
Data in
(H-UDI)
7567
&.,25(1%
Reset
(H-UDI)
CKIO2, 5'5,
RD/:55
enable
240 C6
241 A4
NC
VDD-PLL2 Power PLL2 VDD
(3.3V)
242 D6
243 B4
VSS-PLL2 Power PLL2 GND (0V)
VDD-PLL1 Power PLL1 VDD
(3.3V)
244 D5
245 A3
VSS-PLL1 Power PLL1 GND (0V)
VDD-CPG Power CPG VDD
(3.3V)
246 B3
247 A2
VSS-CPG Power CPG GND (0V)
XTAL
O
Crystal
resonator
Rev. 6.0, 07/02, page 21 of 986