Table 1.3 Pin Functions (cont)
Memory Interface
Pin
No.
88
89
90
91
92
Pin Name
VSSQ
&66
I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
Power IO GND (0 V)
O
O
Chip select 3
Chip select 2
&66
&65
(&66)
(&65)
&66
&65
&66
&65
&65
VDD
Power Internal VDD
VSS
Power Internal GND
(0 V)
93
94
5$6
O
O
5$6
5$6
5$6
&$6
5'/&$66/
Read/&$6/
2(
2(
)5$0(
)5$0(
)5$0(
95
96
RD/:5
O
O
Read/write
RD/:5 RD/:5 RD/:5
RD/:5
:(5/&$65/
D23–D16 select
signal
:(5
:(6
:(9
&$65
&$66
&$69
DQM2 ,&,25'
DQM3 ,&,2:5
DQM6
DQM2/
,&,25'
97
98
:(6/&$66/
O
O
D31–D24 select
signal
DQM3/
,&,2:5
:(9/&$69/
D55–D48 select
signal
DQM6
99
VDDQ
VSSQ
Power IO VDD (3.3 V)
Power IO GND (0 V)
100
101
:(:/&$6:/
DQM7/5(*
O
D63–D56 select
signal
:(:
&$6:
DQM7 5(*
102
103
104
105
106
D23
I/O
I/O
I/O
I
Data
A23
A24
A22
D24
Data
D22
Data
RXD
'5(43
SCI Data input
I
Request from
DMAC0
107
'5(44
I
Request from
DMAC1
108
109
110
111
112
113
D25
D21
D26
D20
D27
VDDQ
I/O
I/O
I/O
I/O
I/O
Data
Data
Data
Data
Data
A25
A21
A20
Power IO VDD (3.3 V)
Rev. 6.0, 07/02, page 26 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
