Table 1.2 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Data
Reset
SRAM DRAM SDRAM PCMCIA MPX
142 R20 D29
143 N18 VDDQ
144 N17 VSSQ
145 P19 D17
146 P20 D30
147 N19 D16
148 N20 D31
149 M18 VDDQ
150 M17 VSSQ
151 M19 D55
152 M20 D56
153 L19 D54
154 L20 D57
155 L18 VDDQ
156 L17 VSSQ
157 K20 D53
158 K19 D58
159 J20 D52
160 J19 D59
161 K18 VDDQ
162 K17 VSSQ
163 H20 D51
164 H19 D60
165 G20 D50
166 G19 D61
167 J18 VDDQ
168 J17 VSSQ
169 F20 D49
170 F19 D62
171 G18 VDD
172 G17 VSS
I/O
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data
Data
Data
Data
A17
A16
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data
Data
Data
Data
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data
Data
Data
Data
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data/port
Data
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Data/port
Data
(Port)
ACCSIZE0
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
Data/port
Data
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
ACCSIZE1
Power Internal VDD
Power Internal GND
(0 V)
173 E20 D48
I/O
Data/port
(Port)
Rev. 6.0, 07/02, page 18 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
