Table 1.2 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Data
Reset
SRAM DRAM SDRAM PCMCIA MPX
174 E19 D63
I/O
ACCSIZE2
175 F18 VDDQ
176 F17 VSSQ
177 E17 VSSQ
178 E18 RD/:55
Power IO VDD (3.3 V)
Power IO GND (0 V)
Power IO GND (0 V)
O
RD/:5
RD/:5 RD/:5 RD/:5
RD/:5
179 D20 MD0/SCK I/O
Mode/SCI
clock
MD0
MD1
MD2
SCK
SCK
SCK
SCK
SCK
180 D19 MD1/TXD2 I/O
Mode SCIF
data output
TXD2
RXD2
TXD2
RXD2
TXD2
RXD2
TXD2
RXD2
TXD2
RXD2
181 D18 MD2/RXD2
I
Mode/SCIF
data input
182 C20 ,5/3
183 C19 ,5/4
184 B20 ,5/5
185 C18 ,5/6
186 A20 NMI
I
I
I
I
I
Interrupt 0
Interrupt 1
Interrupt 2
Interrupt 3
Nonmaskable
interrupt
187 B19 XTAL2
188 A19 EXTAL2
O
I
RTC crystal
resonator pin
RTC crystal
resonator pin
189 B18 VSS-RTC Power RTC GND
(0 V)
190 A18 VDD-RTC Power RTC VDD
(3.3 V)
2
*
191 D17 CA
192 C17 VSS
I
Power Internal GND
(0 V)
193 B17 VDDQ
Power IO VDD (3.3 V)
194 C16 &765
I/O
SCIF data
control (&76)
195 A17 TCLK
I/O
RTC/TMU
clock
196 B16 MD8/5765 I/O
Mode/SCIF
data control
(576)
MD8
5765
5765
5765
5765
5765
Rev. 6.0, 07/02, page 19 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
