1.4.2
Pin Functions (208-Pin QFP)
Table 1.3 Pin Functions
Memory Interface
Pin
No.
SRAM DRAM SDRAM PCMCIA MPX
Pin Name
5'<
5(6(7
&63
I/O
I
Function
Reset
1
Bus ready
5'<
5'<
5'<
2
I
Reset
5(6(7
3
O
O
O
O
O
O
Chip select 0
Chip select 1
Chip select 4
Chip select 5
Chip select 6
Bust start
&63
&64
&67
&68
&69
(%6)
&63
&64
&67
&68
&69
(%6)
4
&64
5
&67
6
&68
&(4$
&(4%
(%6)
7
&69
8
%6
(%6)
(%6)
9
VDDQ
VSSQ
D47
Power IO VDD (3.3 V)
Power IO GND (0 V)
10
11
12
13
14
I/O
I/O
Data/port
Data/port
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
D32
VDD
VSS
Power Internal VDD
Power Internal GND
(0 V)
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
D46
D33
D45
D34
D44
D35
VDDQ
VSSQ
D43
D36
D42
D37
D41
D38
D40
D39
I/O
I/O
I/O
I/O
I/O
I/O
Data/port
Data/port
Data/port
Data/port
Data/port
Data/port
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Data/port
Data/port
Data/port
Data/port
Data/port
Data/port
Data/port
Data/port
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Rev. 6.0, 07/02, page 23 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
