Table 1.2 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
115 W16 RD/:5
O
Read/write
RD/:5 RD/:5 RD/:5
RD/:5
116 Y17 :(5/&$65/ O
D23–D16
select signal
:(5
:(6
:(9
&$65
&$66
&$69
DQM2 ,&,25'
DQM3 ,&,2:5
DQM6
DQM2/
,&,25'
117 W17 :(6/&$66/ O
D31–D24
select signal
DQM3/
,&,2:5
118 Y18 :(9/&$69/ O
D55–D48
select signal
DQM6
119 V16 VDDQ
120 U16 VSSQ
Power IO VDD (3.3 V)
Power IO GND (0 V)
121 W18 :(:/&$6:/ O
DQM7/5(*
D63–D56
select signal
:(:
&$6:
DQM7 5(*
122 Y19 D23
123 W19 D24
124 Y20 D22
125 V17 RXD
126 U17 '5(43
I/O
Data
A23
A24
A22
I/O
Data
I/O
Data
I
I
SCI data input
Request from
DMAC0
127 U18 '5(44
I
Request from
DMAC1
128 W20 D25
129 T18 VDDQ
130 T17 VSSQ
131 V19 D21
132 V20 D26
133 U19 D20
134 U20 D27
135 R18 VDDQ
136 R17 VSSQ
137 T19 D19
138 T20 D28
139 P18 VDD
140 P17 VSS
I/O
Data
A25
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data
Data
Data
Data
A21
A20
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
Data
Data
A19
Power Internal VDD
Power Internal GND
(0 V)
141 R19 D18
I/O
Data
A18
Rev. 6.0, 07/02, page 17 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
