Table 1.2 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
K2
K1
K3
K4
L1
D42
I/O
I/O
Data/port
Data/port
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
D37
VDDQ
VSSQ
D41
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data/port
Data/port
Data/port
Data/port
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
L2
D38
M1
M2
L3
D40
D39
VDDQ
VSSQ
D15
Power IO VDD (3.3 V)
Power IO GND (0 V)
L4
N1
N2
P1
P2
M3
M4
R1
R2
P3
P4
I/O
I/O
I/O
I/O
Data
Data
Data
Data
A15
A0
D0
D14
A14
A1
D1
VDDQ
VSSQ
D13
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
Data
Data
A13
A2
D2
VDD
VSS
Power Internal VDD
Power Internal GND
(0 V)
49
50
51
52
53
54
55
56
57
58
59
60
T1
T2
R3
R4
U1
U2
V1
V2
T3
T4
W1
Y1
D12
D3
I/O
I/O
Data
Data
A12
A3
VDDQ
VSSQ
D11
D4
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
I/O
I/O
Data
Data
Data
Data
A11
A4
D10
D5
A10
A5
VDDQ
VSSQ
D9
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I/O
Data
Data
A9
A6
D6
Rev. 6.0, 07/02, page 14 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
