14.3.4 Types of DMA Transfer
The DMAC supports the transfers shown in table 14.6. It can operate in single address mode, in
which either the transfer source or the transfer destination is accessed using the acknowledge
signal, or in dual address mode, in which both the transfer source and transfer destination
addresses are output. The actual transfer operation timing depends on the bus mode, which can be
either burst mode or cycle steal mode.
Table 14.6 Supported DMA Transfers
Transfer Destination
External Device External
Memory-Mapped On-Chip
External Device Peripheral Module
Transfer Source
with DACK
Memory
External device
with DACK
Not available
Single address Single address Not available
mode
mode
External memory
Single address
mode
Dual address
mode
Dual address mode Dual address mode
Dual address mode Dual address mode
Dual address mode Not available
Memory-mapped
external device
Single address
mode
Dual address
mode
On-chip peripheral
module
Not available
Dual address
mode
Rev. 6.0, 07/02, page 518 of 986