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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Address Modes  
Single Address Mode: In single address mode, both the transfer source and the transfer  
destination are external; one is accessed by the DACK signal and the other by an address. In this  
mode, the DMAC performs a DMA transfer in one bus cycle by simultaneously outputting the  
external device strobe signal (DACK) to either the transfer source or transfer destination external  
device to access it, while outputting an address to the other side of the transfer. Figure 14.5 shows  
an example of a transfer between external memory and an external device with DACK in which  
the external device outputs data to the data bus and that data is written to external memory in the  
same bus cycle.  
External  
address  
bus  
External  
data bus  
SH7750 Series  
DMAC  
External  
memory  
External device  
with DACK  
DACK  
: Data flow  
Figure 14.5 Data Flow in Single Address Mode  
Two types of transfer are possible in single address mode: (1) transfer between an external device  
with DACK and a memory-mapped external device, and (2) transfer between an external device  
with DACK and external memory. Only the external request signal ('5(4) is used in both these  
cases.  
Figure 14.6 shows the DMA transfer timing for single address mode.  
The access timing depends on the type of external memory. For details, see the descriptions of the  
memory interfaces in section 13, Bus State Controller (BSC).  
Rev. 6.0, 07/02, page 519 of 986  
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