S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
END_AISI
The END_AISI bit indicates that an End-to-End AIS alarm (in the VC Table) has changed
state. When logic 1, the END_AISI bit indicates the End-to-End AIS Alarm bit in the VC
Table has changed state for one or more virtual connections. This bit is cleared when this
register is read.
SEG_RDII
The SEG_RDII bit indicates that a Segment RDI alarm (in the VC Table) has changed state.
When logic 1, the SEG_RDII bit indicates the Segment RDI Alarm bit in the VC Table has
changed state for one or more virtual connections. This bit is cleared when this register is
read.
END_RDII
The END_RDII bit indicates that an End-to-End RDI alarm (in the VC Table) has changed
state. When logic 1, the END_RDII bit indicates the End-to-End RDI Alarm bit in the VC
Table has changed state for one or more virtual connections. This bit is cleared when this
register is read.
OAM_FAILI
The OAM_FAILI bit indicates that the OAM_Failure bit in the VC Table has changed state
for one or more virtual connections. This bit is cleared when this register is read.
POLI
The POLI bit indicates a non-compliant cell has been received. When logic 1, the POLI bit
indicates one or more cells have violated the traffic contract since the last read of this register.
This bit is cleared when this register is read.
PHYPOLI
The PHY Policing Interrupt bit (PHYPOLI) indicates that one or more cells have violated
one or more per-PHY policing contracts. When logic 1, the PHYPOLI bit indicates one or
more cells have violated one or more of the 48 PHY policing instances. This bit is cleared
when this register is read.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
158
PMC [ PMC-SIERRA, INC ]
