PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Polled Mode
In the polled mode, the RDLINT and RDLEOM outputs of the RFDL are not
used, and the processor controlling the RFDL must periodically read the RFDL
Interrupt/Status to determine when to read the Data Register. If the RFDL data
transfer is operating in the polled mode, entry to the service routine is from a
timer. The processor service routine should process the data in the following
order:
1. Poll the INT bit in the RFDL Interrupt/Status Register until it is set to logic 1.
Once INT is set to logic 1, then proceed to step 2.
2. Read the RFDL Data Register.
3. Read the RFDL Status Register to check for the following:
a) If OVR=1, then discard the current frame and go to step 1.
ELSE
b) If FLG=0 (i.e. an abort has been received) and the link state was active,
then set the link state to inactive, discard the current frame, and go to step 1.
c) If FLG=1 and the link state was inactive, then set the link state to active,
discard the last data byte, and go to step 1.
ELSE
d) Save the last data byte read.
e) If EOM=1, then read the CRC and NVB[2:0] bits of the RFDL Status
Register to process the frame properly.
f) If FE=0, then go to step 2, else go to step 1.
The link state is typically a local software variable. The link state is inactive if the
RFDL is receiving all ones or receiving bit-oriented codes which contain a
sequence of eight ones. The link state is active if the RFDL is receiving flags or
data.
Interrupt Mode
In the interrupt driven mode, the processor controlling the RFDL uses the
RDLINT output, the main processor INTB output (RDLINTE bit of the Datalink
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200
PMC [ PMC-SIERRA, INC ]
