PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
14
OPERATIONS
14.1 Configuring the E1XC from Reset
After a system reset (either via the RSTB pin or via the RESET register bit), the
E1XC will default to the following settings:
Table 10
Setting
- E1XC Default Settings
Receiver Section
Transmitter Section
Framing Format
Basic G.704 without
CRC multiframe.
Basic G.704 without
CRC multiframe.
Channel Associated
Signalling is enabled.
Channel Associated
Signalling is enabled.
Line Code
HDB3
HDB3
E1 interface
• RSLC active, outputs
from RSLC used
internally for clock and
data recovery
• XPLS active
• Digital interface active
• TDP, TDN outputs NRZ
data updated on falling
TCLKO edge
• Pins SDP/RDP/RDD
and SDN/RDN/RLCV
active as digital inputs
RDP and RDN, but
ignored
System Backplane
Data Link
• BRPCM, BRSIG active • BTPCM active
• BRFPO indicates frame BTSIG inactive
pulses
• BTFP indicates frame
alignment
• internal RFDL disabled • internal XFDL disabled
• RDLSIG and RDLCLK • TDLCLK output,
outputs present the Sa4 TDLSIG input inserted
bit of TS0.
into Sa4 bit of TS0.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
196
PMC [ PMC-SIERRA, INC ]
