Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
7.16.5.1 Audio mode control
There are 3 audio mode bits to select which TSL is active and how to synchronize and combine them. The first half of
Table 105 supports asynchronous operation of A1 and A2, each following their own configuration bits and working
independent of each other. In the second half of the table, the two interfaces work synchronously, according to the clock
configuration setting of A1_CLKSRC. Some special cases are discussed below.
AUDIO_MODE [2:0] = 7: the two TSLs are chained to each other thus enabling a longer TSL, with up to 32 time slots to
be built (SINGER format). There is only one common TSL pointer active which is able to reach the whole address range.
The pointer synchronisation is done according to the A1 configuration. There is only one EOS bit needed.
AUDIO_MODE [2:0] = 5 ↔ 6: both interfaces working synchronously on the same TSL half and with the same record.
Synchronous change from one TSL to the other TSL when reaching the protection address. By that the TSL can be
changed, by switching to the other TSL, without disturbing real time flow of audio streams. There is no time gap
necessary for reprogramming a TSL. Reprogramming is performed by using the other TSL as shadow. The two TSL
pointers are locked, i.e. each one pointing to its own list area, but resetting and incrementing synchronously.
Table 105 Audio_mode control
AUDIO_MODE
AUDIO INTERFACE A1
AUDIO INTERFACE A2
[2:0]
0
1
off
off
off
processing TSL1; synchronisation according to
A1 configuration
2
3
4
off
processing TSL2; synchronisation according
to A2 configuration
processing TSL1; synchronisation according
to A1 configuration
processing TSL2; synchronisation according
to A2 configuration
processing TSL1; synchronisation according
to A1 configuration
processing TSL2; TSL2 pointer is in sync
(locked) to TSL1 pointer;
TSL2 pointer = TSL1 pointer + 16
5
6
7
processing TSL1; synchronisation according
to A1 configuration
processing TSL1 in common with A1;
TSL2 pointer = TSL1 pointer
processing TSL2 in common with A2;
TSL1 pointer = TSL2 pointer
processing TSL2; synchronisation according
to A1 configuration
processing TSL1 and TSL2 in common with A2, processing TSL1 and TSL2 in common with A1;
synchronization according to A1 configuration;
TSL1 pointer range is up to 32 records
TSL2 pointer = TSL1 pointer
1998 Apr 09
119
NXP [ NXP ]
