Philips Semiconductors
Product specification
9-bit video input processor
SAA7113H
15.2.15 SUBADDRESS 0EH
Table 41 Chrominance control SA 0E
FUNCTION
CHBW/CSTD
BIT
LOGIC
LEVEL
DATA BIT
50 Hz
60 Hz
Chrominance bandwidth (CHBW0 and CHBW1)
Small bandwidth (≈ 620 kHz)
CHBW1
CHBW0
CHBW1
CHBW0
CHBW1
CHBW0
CHBW1
CHBW0
0
0
0
1
1
0
1
1
D1
D0
D1
D0
D1
D0
D1
D0
Nominal bandwidth (≈ 800 kHz)
Medium bandwidth (≈ 920 kHz)
Wide bandwidth (≈ 1000 kHz)
Fast colour time constant (FCTC)
Nominal time constant
Fast time constant
FCTC
FCTC
0
1
D2
D2
Disable chrominance comb filter (DCCF)
Chrominance comb filter on (during lines determined by VREF = 1;
see Table 45)
DCCF
DCCF
0
1
D3
D3
Chrominance comb filter permanently off
Colour standard selection (CSTD0 to CSTD2); logic levels 100, 110 and 111 are reserved, do not use
PAL BGHIN
NTSC M (or NTSC-Japan with special
level adjustment: brightness
subaddress 0AH = 95H; contrast
subaddress 0BH = 48H)
CSTD2
CSTD1
CSTD0
0
0
0
D6
D5
D4
NTSC 4.43 (50 Hz)
Combination-PAL N
NTSC N
PAL 4.43 (60 Hz)
NTSC 4.43 (60 Hz)
PAL M
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
CSTD2
CSTD1
CSTD0
0
0
1
0
1
0
0
1
1
1
0
1
D6
D5
D4
D6
D5
D4
D6
D5
D4
D6
D5
D4
SECAM
reserved
1999 Jul 01
59
NXP [ NXP ]
