Philips Semiconductors
Product specification
9-bit video input processor
SAA7113H
15.2.11 SUBADDRESS 0AH
Table 37 Luminance brightness control BRIG7 to BRIG0 SA 0A
CONTROL BITS D7 TO D0
OFFSET
BRIG7
BRIG6
BRIG5
BRIG4
BRIG3
BRIG2
BRIG1
BRIG0
255 (bright)
128 (CCIR level)
0 (dark)
1
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
15.2.12 SUBADDRESS 0BH
Table 38 Luminance contrast control CONT7 to CONT0 SA 0B
CONTROL BITS D7 TO D0
GAIN
CONT7
CONT6
CONT5
CONT4
CONT3
CONT2
CONT1
CONT0
1.999 (maximum)
1.109 (CCIR level)
1.0
0
0
0
0
1
1
1
1
1
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
0
0 (luminance off)
−1 (inverse luminance)
−2 (inverse luminance)
15.2.13 SUBADDRESS 0CH
Table 39 Chrominance saturation control SATN7 to SATN0 SA 0C
CONTROL BITS D7 TO D0
GAIN
SATN7
SATN6
SATN5
SATN4
SATN3
SATN2
SATN1
SATN0
1.999 (maximum)
1.0 (CCIR level)
0
0
0
1
1
1
1
0
1
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0 (colour off)
−1 (inverse chrominance)
−2 (inverse chrominance)
15.2.14 SUBADDRESS 0DH
Table 40 Chrominance hue control HUEC7 to HUEC0 SA 0D
CONTROL BITS D7 TO D0
HUE PHASE (DEG)
HUEC7
HUEC6
HUEC5
HUEC4
HUEC3
HUEC2
HUEC1
HUEC0
+178.6...
...0...
0
0
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
...−180
1999 Jul 01
58
NXP [ NXP ]
