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OXCB950-TQAG 参数 Datasheet PDF下载

OXCB950-TQAG图片预览
型号: OXCB950-TQAG
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的高性能UART的Cardbus / 3.3V PCI接口 [Integrated High Performance UART Cardbus / 3.3v PCI interface]
分类和应用: PC
文件页数/大小: 67 页 / 598 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
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OXCB950  
OXFORD SEMICONDUCTOR LTD.  
6.6.3 Cardbus Power management  
Specifically for the generation of ‘wake-up’ events, the PC  
Card Standard notes that in an ACPI operating system,  
there is no cardbus device driver and so, in order to  
support power management events the PME_En bit in the  
PCI configuration region must support generating a  
CSYSCHG signal for a cardbus card. PME_En must make  
the cardbus card power management functionality act as if  
the cardbus card were a standard PCI device.  
For cardbus mode, the cardbus status registers as given by  
the tuple CISTPL_CONFIG_CB and located at the memory  
base address register BAR4, are disabled (bypassed) by  
default. This results in the power management behaviour  
for the device in cardbus mode being identical to the power  
management behaviour for the device in the pci mode, with  
the exception that the power management event (the  
wakeup request) is available on the CSYSCHG pin for  
cardbus modes and the PME# pin for pci modes.  
To achieve this effect when the cardbus status registers  
are enabled, and the operating system sets the PME_En  
bit true (in the PCI power management register block) this  
action also sets true the GWAKE bit (bit4) and the WKUP  
bit (bit14) fields in the Cardbus Function Event Mask  
Register. This ensures that any recognised wakeup events  
allow the assertion of the CSYSCHG line. Setting the  
PME_En bit false, also clears the GWAKE and WKUP bits  
in the Function Event Mask Register to deassert or inhibit  
the power management on the CSYSCHG line.  
The default setting means that all ‘powerdown’ and  
‘wakeup’ requests, in the cardbus mode, have not been  
conditioned by the 4 sets of registers making up the  
cardbus status registers. For those applications that require  
the cardbus status registers to be enabled, then the power  
management logic for cardbus mode incurs the following  
controls.  
Since all powerdown requests are interrupt requests, then  
powerdown requests on the device’s interrupt pin (CINT#)  
will be controlled according to the INTR fields of the  
cardbus status registers. That is, a powerdown request will  
be asserted only if the INTR field in the Function Event  
Mask Register has been set and the corresponding field in  
the Function Event Register has detected a valid (internal)  
power down request. Similarly, the wakeup (power  
management events) are controlled by the GWAKE/WKUP  
fields in the cardbus status registers. A ‘wakeup’ event for  
cardbus applications will only be invoked if the  
GWAKE/WKUP fields in the Function Event Mask Register  
have been enabled and the GWAKE field in the Function  
Event Register has detected a ‘wakeup’ request. Note that  
these controls are on top of the controls for ‘powerdown’  
and ‘wakeup’ requests as given in the local configuration  
registers.  
Once the PME_En bit is set, the function targets the  
GWAKE bit in the Function Event Register as the function’s  
general wakeup event. When enabled (PME_En true) any  
wakeup events are latched into the PME_status and the  
cardbus card’s GWAKE bit in the Function Event register.  
Clearing the GWAKE/WKUP fields in the Function Event  
Mask Register, to disable wakeup events on the CSYCHG  
pin, does not clear the PME_En bit in the PCI power  
management  
register block. Writing a ‘1’ to the  
PME_status bit of the PCI power management register  
block will clear the GWAKE bit in the Function Event  
register deasserting the CSYSCHG event. Clearing the  
GWAKE bit in the Function Event register, by writing a ‘1’,  
clears the PME_status bit in the PMCSR register.  
These actions are summarised below (taken from table 6-2 of the PC card standard)  
ACPI Operating System  
Cardbus PCI  
Function Event Mask  
Register  
Function Event  
Cardbus pin  
Cardbus PCI  
configuration Space  
PME_status  
Default 0  
Configuration Space  
Register  
PME_En  
Default 0  
Written 1  
1
GWAKE / WKUP  
Default 0 / Default 0  
Follows PME_En  
1 / 1  
GWAKE  
CSYSCHG  
Defualt 0  
Default 0  
0
0
0
1
0
0
0
1
1 / 1  
1(detected wakeup  
Latches wakeup  
(CSYSCHG) event  
event)  
Written 0  
Follows PME_En  
1
0
0
Don’t Care  
Don’t care/ Don’t care  
0
Non-ACPI Operating System  
No effect  
Per cardbus electrical sepcification  
No effect  
DS-0033 Sep 05  
External-Free Release  
Page 24  
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