MT9076
Preliminary Information
Bit
Name
Functional Description
7
TFSYNI Terminal Frame Synchronization Interrupt. When unmasked this interrupt bit goes high
whenever a change of state of terminal frame synchronization condition exists. Reading this
register clears this bit.
6
5
MFSYNI Multiframe Synchronization Interrupt. When unmasked this interrupt bit goes high
whenever a change of state of multiframe synchronization condition exists. Reading this
register clears this bit.
CRCSYNI CRC-4 Synchronization Interrupt. When unmasked this interrupt bit goes high whenever
change of state of CRC-4 synchronization condition exists. Reading this register clears this
bit.
4
3
AISI
Alarm Indication Signal Interrupt. When unmasked this interrupt bit goes high whenever a
change of state of received all ones condition exists. Reading this register clears this bit.
LOSI
Loss of Signal Interrupt. When unmasked this interrupt bit goes high whenever a loss of
signal (either analog - received signal 20 or 40 dB below nominal or digital - excess
consecutive 0’s received) condition exists.
2
CEFI
YI
Consecutively Errored Frame Alignment Interrupt. When unmasked this interrupt bit
goes high whenever the last two frame alignment signals have errors. Reading this register
clears this bit.
1
0
Receive Y-bit Interrupt. When unmasked this interrupt goes high whenever loss of
multiframe alignment occurs. Reading this register clears this bit.
RxSLPI Receive SLIP Interrupt. When unmasked this interrupt bit goes high whenever a controlled
frame slip occurs in the receive elastic buffer. Reading this register clears this bit.
Table 144 - Interrupt Word Zero
(Page 4, Address 1BH) (E1)
120
MITEL [ MITEL NETWORKS CORPORATION ]
