MT9076
Preliminary Information
21.2
Per Channel Transmit signaling (Pages 5 and 6) (E1)
Page 05H, addresses 10000 to 11111, and page 06H addresses 10000 to 10111 contain the Transmit signaling
Control Words for Channel Associated signaling (CAS) channels 2 to 16 and 18 to 32 respectively. Table 149
illustrates the mapping between the addresses of these pages and the CAS channel numbers. Control of these
bits for any one channel is through the processor or controller port when the Per Time Slot Control bit RPSIG
bit is high. Table 150 describes bit allocation within each of these registers.
Page 5-6 Address:
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10 11 12 13 14 15
Equivalent CAS
channel
10 11 12 13 14 15 16
Page 6 Address:
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
Equivalent CAS
channel
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Table 149 - Page 5, 6 Address Mapping to CAS signaling Channels (E1)
Bit
Name
Functional Description
7 - 4
3 - 0
- - -
Unused.
A(n)
B(n)
C(n)
D(n)
Transmit signaling Bits for Channel n. These bits are transmitted on the PCM 30 2048
kbit/sec. Link in bit positions one to four of time slot 16 in frame n (when
n = 1 to 15), and are the A, B, C, D signaling bits associated with channel n.
Table 150 - Transmit Channel Associated signaling (E1) (Pages 5,6)
Serial per channel transmit signaling control through CSTI is selected when RPSIG bit is zero. Table 151
describes the function of CSTI time slots 1 to 30. if MSN bit is high, CSTI time slots 17 to 31 are selected. if
MSN bit is low, CSTI time slots 1 to 15 are selected.
Bit
Name
Functional Description
7 - 4
A(n),
B(n),
C(n),
D(n)
Transmit signaling Bits for Channel n. These bits are transmitted on the PCM 30 2048
kbit/sec. Link in bit positions one to four of time slot 16 in frame n (where
n = 1 to 15), and are the A, B, C, D signaling bits associated with channel n.
3 - 0
A(n),
B(n),
C(n),
D(n)
Transmit signaling Bits for Channel n. These bits are transmitted on the PCM 30 2048
kbit/sec. Link in bit positions one to four of time slot 16 in frame n (where
n = 1 to 15), and are the A, B, C, D signaling bits associated with channel n.
Table 151 - E1 / Transmit Channels Usage - CSTi
NOTE: This table illustrates bit mapping on the serial input stream - it does not refer to an internal register.
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